LOW POWER MULTI-VALUED ARITHMETIC LOGICAL UNIT DESIGN USING CNFETS
By: MAHOR (LOKESH).
Material type: BookPublisher: DELHI TECHNOLOGICAL UNIVERSITY 2019Description: 63.Subject(s): ELECTRONICS AND COMMUNICATIONDDC classification: 621.382 MAH Dissertation note: M.TECH 2019 MR. PIYUSH TEWARIItem type | Current location | Call number | Status | Date due | Barcode |
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Elec. Thesis & Dissertation |
Delhi Technological University
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621.382 MAH (Browse shelf) | Not for loan | TD-4680 |
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M.TECH 2019 MR. PIYUSH TEWARI
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